|
|
The I2S report has been upload to mantis ID: 000965:0006319 by Tom. |
|
|
Hi, SH I attached I2S bus with buffer IC and without buffer IC timing report for you reference. In I2S bus without buffer IC condition, rising and falling time of BCLK of ADC3100 are fail. After add buffer IC on each terminal of I2S bus can fix this issue. Thanks ! |
|
|
Hi Tom Please update the i2s test report with New Amp IC. Thanks SON |
|
|
Hi Tom Please update the i2s test report with New Amp IC. |
|
|
Hi, SH Attached are DVT3 boatd I2S test report for you reference. For AMP board, parameter "WCK setup time before BCK rising edge (tWS)" is fail, other items are pass. Thanks ! |
|
|
Hi, Tom Please update attached S/W to Amp board, then test. I updated our tested waveform. Best regards Lonnie Kim scope_11.png (65,738 bytes) scope_12.png (66,758 bytes) scope_13.png (66,554 bytes) |
|
|
|
|
|
Hi, Lonnie New A113X image can pass I2S timing test. Attached are the test report for you reference. Thanks ! Tom |
|
|
Hi, Tom THank you for your report. Best regards Lonnie Kim |
|
|
Dear ALT team, I would like to close these open issues on mantis since they are related to the EVT/DVT HW test items, releability, certificaions etc., and should have passed with good result. So, You can reopen it if you found any issues and would like to raise it again for further discussion. Thanks, Regards, Sean |
- yk.jung ( (ALTech) Younkwang Jung ) developer
